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  rev. d information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. a ad8009 one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781/329-4700 world wide web site: http://www.analog.com fax: 781/326-8703 ? analog devices, inc., 2000 1 ghz, 5,500 v/  s low distortion amplifier functional block diagrams 8-lead plastic soic (so-8) 5-lead sot-23 (rt-5) product description the ad8009 is an ultrahigh speed current feedback amplifier with a phenomenal 5,500 v/ s slew rate that results in a rise time of 545 ps, making it ideal as a pulse amplifier. the high slew rate reduces the effect of slew rate limiting and results in the large signal bandwidth of 440 mhz required for high resolution video graphic systems. signal quality is main- tained over a wide bandwidth with worst case distortion of ?0 dbc @ 250 mhz (g = +10, 1 v p-p). for applications with mult itone signals such as if signal chains, the third order interc ept (3ip) of 12 dbm is achieved at the same frequency. this distortion performance coupled with the current feedback architecture make the ad8009 a flexible component for a gain stage amplifier in if/rf signal chains. the ad8009 is capable of delivering over 175 ma of load current and will drive four back terminated video loads while maintaining low differential gain and phase error of 0.02% and 0.04 respectively. the high drive capability is also reflected in the ability to deliver 10 dbm of output power @ 70 mhz with ?8 dbc sfdr. the ad8009 is available in a small soic package and will operate over the industrial temperature range ?0 c to +85 c. the ad8009 is also available in an sot-23-5 and will operate over the commercial temperature range 0 c to 70 c. distortion ?dbc ?0 ?0 ?0 ?0 ?0 ?0 ?00 ?0 2nd, 150  load 2nd, 100  load 3rd, 150  load 3rd, 100  load g = 2 r f = 301  v o = 2v p-p frequency response ?mhz 1 200 10 100 figure 2. distortion vs. frequency; g = +2 features ultrahigh speed 5,500 v/  s slew rate, 4 v step, g = +2 545 ps rise time, 2 v step, g = +2 large signal bandwidth 440 mhz, g = +2 320 mhz, g = +10 small signal bandwidth (C3 db) 1 ghz, g = +1 700 mhz, g = +2 settling time 10 ns to 0.1%, 2 v step, g = +2 low distortion over wide bandwidth sfdr C44 dbc @ 150 mhz, g = +2, v o = 2 v p-p C41 dbc @ 150 mhz, g = +10, v o = 2 v p-p 3rd order intercept (3ip) 26 dbm @ 70 mhz, g = +10 18 dbm @ 150 mhz, g = +10 good video specifications gain flatness 0.1 db to 75 mhz 0.01% differential gain error, r l = 150  0.01  differential phase error, r l = 150  high output drive 175 ma output load drive 10 dbm with C38 dbc sfdr @ 70 mhz, g = +10 supply operation +5 v to  5 v voltage supply 14 ma (typ) supply current applications pulse amplifier if/rf gain stage/amplifiers high resolution video graphics high speed instrumentations ccd imaging amplifier frequency response mhz 1 2 1 8 0 1 2 3 4 5 6 7 1000 10 normalized gain db 100 g = +2 r f = 301  r l = 150  g = +10 r f = 200  r l = 100  v o = 2vp p figure 1. la rge signal frequency response; g = +2 and +10 1 v out ad8009 v s +in 2 34 5 +v s in 1 2 3 4 8 7 6 5 nc = no connect ad8009 nc in +in v s nc out +v s nc
C2C rev. d ad8009?pecifications (@ t a = 25  c, v s =  5 v, r l = 100  , for r package: r f = 301  for g = +1, +2, r f = 200  for g = +10, for rt package: r f = 332  for g = +1, r f = 226  for g = +2 and r f = 191 for g = +10, unless otherwise noted.) ad8009ar/jrt model conditions min typ max unit dynamic performance ? db small signal bandwidth, v o = 0.2 v p-p r package g = +1, r f = 301 ? 1000 mhz rt package g = +1, r f = 332 ? 845 mhz g = +2 480 700 mhz g = +10 300 350 mhz large signal bandwidth, v o = 2 v p-p g = +2 390 440 mhz g = +10 235 320 mhz gain flatness 0.1 db, v o = 0.2 v p-p g = +2, r l = 150 ? 45 75 mhz slew rate g = +2, r l = 150 ? , 4 v step 4500 5500 v/ s settling time to 0.1% g = +2, r l = 150 ? , 2 v step 10 ns g = +10, 2 v step 25 ns rise and fall time g = +2, r l = 150 ? , 4 v step 0.725 ns harmonic/noise performance sfdr g = +2, v o = 2 v p-p 5 mhz ?4 dbc 70 mhz ?3 dbc 150 mhz ?4 dbc sfdr g = +10, v o = 2 v p-p 5 mhz ?8 dbc 70 mhz ?1 dbc 150 mhz ?1 dbc third order intercept (3ip) 70 mhz 26 dbm w.r.t. output, g = +10 150 mhz 18 dbm 250 mhz 12 dbm input voltage noise f = 10 mhz 1.9 nv/ hz input current noise f = 10 mhz, +in 46 pa/ hz f = 10 mhz, ?n 41 pa/ hz differential gain error ntsc, g = +2, r l = 150 ? 0.01 0.03 % ntsc, g = +2, r l = 37.5 ? 0.02 0.05 % differential phase error ntsc, g = +2, r l = 150 ? 0.01 0.03 degrees ntsc, g = +2, r l = 37.5 ? 0.04 0.08 degrees dc performance input offset voltage 25 mv t min ? max 7mv offset voltage drift 4 v/ c ?nput bias current 50 150 a t min ? max 75 a +input bias voltage 50 150 a t min ? max 75 a open loop transresistance 90 250 k ? t min ? max 170 k ? input characteristics input resistance +input 110 k ? ?nput 8 ? input capacitance +input 2.6 pf input common-mode voltage range 3.8 v common-mode rejection ratio v cm = 2.5 50 52 db output characteristics output voltage swing 3.7 3.8 v output current r l = 10 ? , p d package = 0.7 w 150 175 ma short circuit current 330 ma power supply operating range +5 6v quiescent current 14 16 ma t min ? max 18 ma power supply rejection ratio v s = 4 v to 6 v 64 70 db specifications subject to change without notice.
ad8009 C3C rev. d caution esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge without detection. although the ad8009 features proprietary esd protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid performance degradation or loss of functionality. absolute maximum ratings 1 supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.6 v internal power dissipation 2 small outline package (r) . . . . . . . . . . . . . . . . . . . . 0.75 watts input voltage (common mode) . . . . . . . . . . . . . . . . . . . . v s differential input voltage . . . . . . . . . . . . . . . . . . . . . . . 3.5 v output short circuit duration . . . . . . . . . . . . . . . . . . . . . . observe power derating curves storage temperature range r package . . . . ?5 c to +125 c operating temperature range (a grade) . . . ?0 c to +85 c operating temperature range (j grade) . . . . . . . 0 c to 70 c lead temperature range (soldering 10 sec) . . . . . . . . . 300 c notes 1 stresses above those listed under absolute maximum ratings may cause perma- nent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 specification is for device in free air: 8-lead soic package: ja = 155 c/w. 5-lead sot-23 package: ja = 240 c/w. maximum power dissipation the maximum power that can be safely dissipated by the ad8009 is limited by the associated rise in junction tempera- ture. the maximum safe junction temperature for plastic encapsulated devices is determined by the glass transition temperature of the plastic, approximately 150 c. exceeding this limit temporarily may cause a shift in parametric perfor- mance due to a change in the stresses exerted on the die by the package. exceeding a junction temperature of 175 c for an extended period can result in device failure. while the ad8009 is internally short circuit protected, this may not be sufficient to guarantee that the maximum junction temperature (150 c) is not exceeded under all conditions. to ensure proper operation, it is necessary to observe the maxi- mum power derating curves. ambient temperature c 90 80 2.0 1.0 0 1.5 0.5 50 t j = +150 c maximum power dissipation watts 70 60 50 40 30 20 10 0 40 30 20 10 8-lead soic package 5-lead sot-23 package figure 3. plot of maximum power dissipation vs. temperature ordering guide temperature package package branding model range description option information ad8009achips ?0 c to +85 c die ad8009ar ?0 c to +85 c 8-lead soic so-8 ad8009ar-reel ?0 c to +85 c 8-lead soic 13" tape and reel AD8009AR-REEL7 ?0 c to +85 c 8-lead soic 7" tape and reel ad8009jrt-reel 0 c to 70 c 5-lead sot-23 13" tape and reel hkj ad8009jrt-reel7 0 c to 70 c 5-lead sot-23 7" tape and reel hkj ad8009-eb evaluation board so-8 warning! esd sensitive device
ad8009 C4C rev. d typical performance characteristics frequency mhz normalized gain db 10 100 3 2 1 0 1 6 7 2 3 4 5 1 1000 r package : r l = 100  v o = 200mv p p g = +1, +2 : r f = 301  g = +10 : r f = 200  rt package : g = +1: r f = 332  g = +2: r f = 226  g = +10: r f = 191  g = +1, r g = +10, r & rt g = +2, r & rt g = +1, rt figure 4. frequency response; g = +1, +2, +10, r and rt packages gain db 7 6 5 4 3 2 1 0 1 2 8 100 1 1000 10 frequency mhz g = +2 r f = 301  r l = 150  v o as shown 4v p p 2v p p figure 5. large signal frequency response; g = +2 gain db 7 6 5 4 3 2 1 0 1 2 8 100 1 1000 10 frequency mhz g = +2 r f = 301  r l = 150  v o = 2v p p 40  c +85  c 40  c +85  c figure 6. large signal frequency response vs. temperature; g = +2 6.1 6.0 5.9 5.8 5.7 5.6 5.5 5.4 5.3 5.2 6.2 gain flatness db frequency mhz 10 100 1 1000 g = +2 r f = 301  r l = 150  v o = 200mv p p figure 7. gain flatness; g = +2 gain db 21 20 19 18 17 16 15 14 13 12 22 100 1 1000 10 frequency mhz g = +10 r f = 200  r l = 100  v o as shown 2v p p 4v p p figure 8. large signal frequency response; g = +10 gain db 21 20 19 18 17 16 15 14 13 12 22 100 1 1000 10 frequency mhz g = +10 r f = 200  r l = 100  v o = 2v p p 40  c +85  c figure 9. large signal frequency response vs. temperature; g = +10
ad8009 C5C rev. d distortion dbc 30 80 40 50 60 70 100 90 2nd, 150  load 2nd, 100  load 3rd, 150  load 3rd, 100  load g = 2 r f = 301  v o = 2v p-p frequency response mhz 1 200 10 100 figure 10. distortion vs. frequency; g = +2 35 70 85 40 65 75 80 45 55 50 60 distortion dbc p out dbm 10 12 6 4 2 0 2 4 6 8 10 14 8 200  p out 22.1  50  50  50  250mhz 70mhz 5mhz figure 11. 2nd harmonic distortion vs. p out ; (g = +10) ire 100 0 0.02 diff gain % 0.02 0.00 0.01 0.01 r l = 37.5  r l = 150  g = +2 r f = 301  g = +2 r f = 301  r l = 37.5  r l = 150  0.10 diff phase degrees 0.10 0.00 0.05 0.05 ire 100 0 figure 12. differential gain and phase 30 35 80 40 45 50 55 60 65 70 75 distortion dbc 100 10 5 200 frequency mhz g = +10 r f = 200  r l = 100  v o = 2v p p 2nd 3rd ! (- 

! #$%&'(+ p out dbm distortion dbc 45 80 95 10 812 6 4 20 24 6810 50 75 85 90 55 65 60 70 40 35 14 5mhz 70mhz 250mhz 200  p out 22.1  50  50  50  figure 14. 3rd harmonic distortion vs. p out ; (g = +10) intercept point dbm frequency mhz 10 250 100 10 50 45 40 35 30 25 20 15 200  p out 22.1  50  50  50  figure 15. two tone, 3rd order imd intercept vs. frequency; g = +10
ad8009 C6C rev. d transresistance  1m 100k 10k 1k 0.01 0.1 100 1 gain phase r l = 100  1000 10 phase degrees 0 40 80 120 frequency mhz 160 100 figure 16. transresistance and phase vs. frequency frequency mhz 0.03 0.1 100 10 10 0 10 20 30 40 50 60 70 1 500 psrr db g = +2 r f = 301  r l = 100  100mv p p on top of v s psrr +psrr figure 17. psrr vs. frequency frequency hz 300 0 10 100 250m 1k 10k 100k 1m 10m 100m 250 200 150 100 50 noninverting current inverting current input current pa hz figure 18. current noise vs. frequency 15 20 25 30 35 40 45 50 55 60 10 cmrr db 100 1 1000 10 frequency mhz v in = 200mvp p 100  v o 301  154  301  154  figure 19. cmrr vs. frequency 100 10 1 0.1 0.01 0.03 0.1 100 10 1 500 output resistance  frequency mhz g = +2 r f = 301  figure 20. output resistance vs. frequency input voltage noise nv hz 0 10 8 6 4 2 frequency hz 10 100 250m 1k 10k 100k 1m 10m 100m figure 21. voltage noise vs. frequency
ad8009 C7C rev. d source resistance  noise figure db 25 20 15 10 5 0 100 10 1 500 g = +10 r f = 301  r l = 100  figure 22. noise figure frequency mhz vswr 0.1 1 100 10 2.0 1.8 1.6 1.4 1.2 1 0 500 figure 23. input vswr; g = +10 250 20 18 0 16 14 12 10 8 6 4 2 p out max dbm frequency mhz 5 100 10 r f p out r g 50  50  50  g = +2 r f = 301  g = +10 r f = 200  figure 24. maximum output power vs. frequency 70 80 90 60 50 40 30 20 s 12 db 100 1 1000 10 frequency mhz g = +10 r f = 200  figure 25. reverse isolation (s 12 ); g = +10 vswr 2.0 1.8 1.6 1.4 1.2 1 0 2.2 frequency mhz 0.1 1 100 10 c comp = 0pf c comp = 3pf 200  49.9  c comp 49.9  22.1  500 figure 26. output vswr; g = +10 10 0% 100 90 v out v in = 2v step 250ns 2v 2v g = +10 r f = 200  r l = 100  figure 27. overdrive recovery; g = +10
ad8009 C8C rev. d 1ns 50mv g = +2 r f = 301  r l = 150  v o = 200mv p p figure 28. small signal transient response; g = +2 1ns 500mv g = +2 r f = 301  r l = 150  v o = 2v p p figure 29. 2 v transient response; g = +2 1.5ns 1v g = +2 r f = 301  r l = 150  v o = 4v p p figure 30. 4 v transient response; g = +2 2ns 50mv g = +10 r f = 200  r l = 100  v o = 200mv p p figure 31. small signal transient response; g = +10 2ns 500mv g = +10 r f = 200  r l = 100  v o = 2v p p figure 32. 2 v transient response; g = +10 3ns 1v g = +10 r f = 200  r l = 100  v o = 4v p p figure 33. 4 v transient response; g = +10
ad8009 C9C rev. d frequency mhz 10 1000 100 gain db 8 7 6 5 4 1 3 2 1 0 12 9 6 3 0 15 12 9 6 3 gain db 50  v in c a 499  v out = 200mv p p v out 499  100  c a = 0pf 1 db/div c a = 1pf 1 db/div c a = 2pf 3 db/div 1 figure 34. small signal frequency response vs. parasitic capacitance 1.5ns 40mv v out = 200mv p p v s =  5v c a = 2pf c a = 1pf c a = 0pf 499  100  50  v out v in c a 499  figure 35. small signal pulse response vs. parasitic capacitance 10  f ad8009 hp8753d 49.9  301  49.9  +5v 5v 301  2 10  f + z out = 50  z in = 50  + 0.001  f 0.1  f 0.001  f 0.1  f 3 7 4 6 wavetek 5201 bpf figure 36. ad8009 driving a bandpass rf filter center 50.000 mhz span 80.000 mhz 0 10 20 30 40 50 60 70 80 90 rejection db ad8009 g = 2 r f = r g = 301  driving wavetek 5201 tunable bpf f c = 50mhz ! -6 ! #

?  ! =  applications all current feedback op amps are affected by stray capacitance on their ?nput. f igures 34 and 35 illustrate the ad 8009? response to such capacitance. figure 34 shows the bandwidth can be extended by placing a capaci tor in parallel with the gain resistor. the small signal pulse response corresponding to such an increase in capacitance/ bandwidth is shown in figure 35. as a practical consideration, the higher the capacitance on the input to gnd, the higher r f needs to be to minimize peaking/ringing. rf filter driver the output drive capability, wide bandwidth and low distortion of the ad8009 are well suited for creating gain blocks that can drive rf filters. many of these filters require that the input be driven by a 50 ? source, while the output must be terminated in 50 ? for the filters to exhibit their specified frequency response. figure 36 shows a circuit for driving and measuring the frequency response of a filter, a wavetek 5201 tunable band pass filter that is tuned to a 50 mhz center frequency. the hp8753d network provides a stimulus signal for the measure- ment. the analyzer has a 50 ? source impedance that drives a cable that is terminated in 50 ? at the high impedance nonin- verting input of the ad8009. the ad8009 is set at a gain of two. the series 50 ? resistor at the output, along with the 50 ? termination provided by the filter and its termination, yield an overall unity gain for the measured path. the frequency response plot of figure 37 shows the circuit to have an insertion loss of 1.3 db in the pass band and about 75 db rejection in the stop band.
ad8009 C10C rev. d 10  f + 0.1  f ad8009 75  301  5v 301  2 7 3 6 + 10  f 0.1  f 4 5v ad8009 75  301  301  2 3 6 ad8009 75  301  301  2 3 6 75  75  75  75  coax primary monitor additional monitor 75  coax 75  75  75  75  75  75  red green blue red green blue i out r adv7160 adv7162 i out g i out b figure 38. driving an additional high resolution monitor using three ad8009s rgb monitor driver high resolution computer monitors require very high full power bandwidth signals to maximize their display resolution. the rgb signals that drive these monitors are generally provided by a current-out ramdac that can directly drive a 75 ? doubly terminated line. there are times when the same output wants to be delivered to additional monitors. the termination provided internally by each monitor prohibits the ability to simply connect a second monitor in parallel with the first. additional buffering must be provided. figure 38 shows a connection diagram for two high resolution monitors being driven by an adv7160 or adv7162, a 220 mhz (mega-pixel per second) triple ramdac. this pixel rate requires a driver whose full power bandwidth is at least half the pixel rate or 110 mhz. this is to provide good resolution for a worst case signal that swings between zero scale and full scale on adjacent pixels. the primary monitor is connected in the conventional fashion with a 75 ? termination to ground at each end of the 75 ? cable. sometimes this c onfiguration is called ?oubly termi- nated?and is used when the driver is a high output impedance current source. for the additional monitor, each of the rgb signals close to the ramdac output is applied to a high input impedance, noninvert- ing input of an ad8009 that is configured for a gain of +2. the outputs each drive a series 75 ? resistor, cable and termination resistor in the monitor that divides the output signal by two, thus providing an overall unity gain. this scheme is referred to as ?ack termination?and is used when the driver is a low output impedance voltage source. back termination requires that the voltage of the signal be double the value that the monitor sees. double termination requires that the output current be double the value that flows in the monitor termination.
ad8009 C11C rev. d driving a capacitive load a capacitive load, like that presented by some a/d converters, can sometimes be a challenge for an op amp to drive depending on the architecture of the op amp. most of the problem is caused by the pole created by the output impedance of the op amp and the capacitor that is driven. this creates extra phase shift that can eventually cause the op amp to become unstable. one way to prevent instability and improve settling time when driving a capacitor is to insert a resistor in series between the op amp output and the capacitor. the feedback resistor is still connected directly to the output of the op amp, while the series resistor provides some isolation of the capacitive load from the op amp output. 10  f + 0.1  f 0.001  f 10  f + 0.1  f 0.001  f ad8009 49.9  +5v 5v 3 2 4 r t r s c l 50pf 2v step 7 6 r f r g g = + 2: r f = 301  = r g g = + 10: r f = 200  , r g = 22.1  figure 39. capacitive load drive circuit figure 39 shows such a circuit with an ad8009 driving a 50 pf load. w ith r s = 0, the ad8009 circuit w ill be unstable. for a gain of +2 and +10, it was found experimentally that setting r s to 42.2 ? will minimize the 0.1% settling time with a 2 v step at the output. the 0.1% settling time was measured to be 40 ns with this circuit. for smaller capacitive loads, a smaller r s will yield optimal settling time, while a larger r s will be required for larger capaci tive loads. of course, a larger capacitance will always require more time for settling to a given accuracy than a smaller one, and this will be lengthened by the increase in r s required. at best, a given rc combination will require about 7 time con stants by itself to settle to 0.1%, so a limit will be reached where too large a capacitance cannot be driven by a given op amp and still meet the system? required sett ling time specification.
ad8009 C12C rev. d outline dimensions dimensions shown in inches and (mm). c01011aC0C10/00 (rev. d) printed in u.s.a. 8-lead soic (so-8) 0.1968 (5.00) 0.1890 (4.80) 8 5 4 1 0.2440 (6.20) 0.2284 (5.80) pin 1 0.1574 (4.00) 0.1497 (3.80) 0.0688 (1.75) 0.0532 (1.35) seating plane 0.0098 (0.25) 0.0040 (0.10) 0.0192 (0.49) 0.0138 (0.35) 0.0500 (1.27) bsc 0.0098 (0.25) 0.0075 (0.19) 0.0500 (1.27) 0.0160 (0.41) 8 0 0.0196 (0.50) 0.0099 (0.25) x 45 5-lead plastic surface mount (sot-23) (rt-5) 0.1181 (3.00) 0.1102 (2.80) pin 1 0.0669 (1.70) 0.0590 (1.50) 0.1181 (3.00) 0.1024 (2.60) 1 3 4 5 0.0748 (1.90) bsc 0.0374 (0.95) bsc 2 0.0079 (0.20) 0.0031 (0.08) 0.0217 (0.55) 0.0138 (0.35) 10  0  0.0197 (0.50) 0.0138 (0.35) 0.0059 (0.15) 0.0019 (0.05) 0.0512 (1.30) 0.0354 (0.90) seating plane 0.0571 (1.45) 0.0374 (0.95)


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